Ultra-thin chips

Ultra-thin microchip: 20 µm thickness

With Chipfilm™ technology patented by IMS CHIPS and further developed in cooperation with the Robert Bosch GmbH the manufacture of ultra-thin mechanically flexible chips has now become reality.

The Chipfilm™ technology

In the Chipfilm™ technology the chip thickness is defined by forming a buried cavity beneath the wafer surface within the chip areas.
For this purpose p-doped areas are patterned on the wafers during this preprocess that match the size of the chips to be processed. The following anodic etching process using a HF/isopropanol etching solution creates coarse and fine porous silicon layers in a two-phase etching process while n-doped areas are not affected by the etching solution. During the following (subsequent) annealing cavities matching the chip size are created from the coarse porous silicon.

The fine porous etched silicon contains the structural information of the silicon crystal enabling the growth of silicon in the requested epitaxial chip thickness and doping. The thus preprocessed Chipfilm™ substrate wafers can subsequently pass through the CMOS process without alterations opposed to a process on standard wafers, since the buried cavities practically leave the characteristics unchanged.

Pick, Crack & Place™

Ultra-thin chips are extremely flexible, chip thickness in the above image is 18 µm

In a post-process step the individual dies are separated using a dry trench etching process except for a few anchor structures. After successful functional testing the good-tested dies are lifted off with a Pick & Place tool breaking the anchor structures and releasing the chip.

Characterization of ultra-thin chips

In order to be applicable in flexible substrates the circuits have to function in bent chips as well. An examination of the electrical transistor features and complex circuits on bent chips renders an understanding of the degree of influence and allows for the set up of circuit design rules. The image below shows a 20 µm chip mounted on a foil substrate during measurement of the transistor features under bent conditions.

For more information, please go to "Die Chipfilm™-Technologie – Herstellung ultradünner Siliziumchips mit Hilfe vergrabener Hohlräume in Siliziumwafern"

Measurement of electrical functions on bent chips

Contact

For further information, please contact: Christine Harendt