Fields of activity

Design, fabrication and characterization services

Flexible wafer processing

  • The GaN processing capability at IMS CHIPS can handle GaN wafers from 2-inch up to 8-inch
  • Processing technology for standard as well as novel substrate types (Si, SiC, Sapphire and Bulk GaN)
  • 6-inch and 8-inch GaN-on-Silicon wafers make full use of the CMOS pilot line capabilities at IMS CHIPS
  • The process follows the gold-free, CMOS compatible fashion
  • Ondemand wafer processing in gold-based III-V technology
  • A full palette of processing modules is available for etching, metalization and passivation, which can also be customized depending on the wafer type, size and epitaxial structure
  • Stepper lithography and contact lithography are utilized in standard processing
  • Maskless direct laser lithography enables design prototyping
  • Flexible parametrized layout design libraries enable fast adoption of custom designs

Characterization to enhance your GaN

  • Inline measurements enable robust single process monitoring of full wafers up to 8-inch up to 1 kV
  • Measurements include DC, Pulsed and CV measurements on fully or partially processed wafers
  • The inline measurement capability enables a process and measurement routine to be designed and for studying a certain aspect in the device or the epi-layer quality
  • Fully-automated measurement routines enable efficient full wafer mapping of key device parameters
  • Custom data acquisition software to organize and sort large data sets
  • Reliable data analysis algorithms enable robust extraction of relevant parameters
  • Insight comprehensive data interpretation provides in-depth correlation to the epitaxial material properties and its effect on the final device performance
  • Detailed reports presenting statistical summaries offer a fast but yet comprehensive feedback
  • Prior to processing, the wafer is mapped for bow and visible defects
  • Defects can be categorized by shape and size
  • Defect correlation to electrical parameters is established

Simulation, modeling and more…

  • Device-level numerical simulations of various GaN transistors
  • Deep understanding of internal physical device parameters enables robust device design
  • Novel device design and performance projection by simulated device prototypes
  • Physics based compact model enables optimized circuit and system design which is based on the actual epitaxial layer quality
  • Fitting the model to the measurements allows extraction of important epitaxial related parameters which directly affect the overall device performance

More information: GaN_Flyer_01_2018.pdf

For further information, please contact: Mohammed Alomari